发明名称 INTERLEAVING APPARATUS AND METHOD FOR A COMMUNICATION SYSTEM
摘要 <p>An interleaving apparatus and method to determine a new interleaver size N'=2m¢¥(j+1) and addresses of 0 to N'-1, if a given interleaver size N is larger than 2m¢¥j and smaller than 2m¢¥(j+1), where m represents a first parameter indicating a number of consecutive zero bits from a least significant bit (LSB) to a most significant bit (MSB), and j represents a second parameter corresponding to a decimal value except said consecutive zero bits. The interleaving apparatus and method sequentially stores N input data bits in an interleaver memory with the new interleaver size N' from an address 0 to an address N-1. The interleaving apparatus and method then executes a Partial Bit Reversal(PBRO)-interleaving the memory with the new interleaver size N', and reads data from the memory by deleting addresses corresponding to addresses of N to N'-1 of the memory before interleaving.</p>
申请公布号 WO2003058823(A1) 申请公布日期 2003.07.17
申请号 KR2003000033 申请日期 2003.01.09
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