发明名称 Damascene method employing multi-layer etch stop layer
摘要 Within a damascene method for forming a microelectronic fabrication, there is employed an etch stop layer comprising a comparatively low dielectric constant dielectric material sub-layer having formed thereupon a comparatively high dielectric constant dielectric material sub-layer. Within the method there is also simultaneously etched: (1) an anti-reflective coating layer from an inter-metal dielectric layer; and (2) the etch stop layer from a contact region. The microelectronic fabrication is formed with enhanced performance and enhanced reliability.
申请公布号 US2003134521(A1) 申请公布日期 2003.07.17
申请号 US20020044599 申请日期 2002.01.11
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 GUO CHENG-CHENG;CHEN DIAN-HAU;TURN LI-KONG;SHENG HAN-MING
分类号 H01L21/311;H01L21/768;(IPC1-7):H01L21/31 主分类号 H01L21/311
代理机构 代理人
主权项
地址