TRANSCEIVER WITH MULTI-STATE DIRECT DIGITAL SYNTHESIZER DRIVEN PHASE LOCKED LOOP

摘要

Transceivers for use in time division telecommunication units like mobile phones and base stations can be produced at lower costs by, in a transmitting mode, switching the direct digital synthesizer (DDS 24) driven phase locked loop (PLL 10-15) into a modulating state and supplying a modulation signal to the DDS and switching in the PLL a first filter (12) allowing the generation of an improved modulated signal, and by, in a receiving mode, switching the DDS driven PLL into an oscillating state and supplying a non-modulation signal to the DDS and switching in the PLL a second filter (13) allowing demodulation with reduced phase noise. A transmitter part (2) and a non-transmitter part (4,6) share a single DDS driven PLL, based upon the basic idea of using important parts in low cost transceivers for both modes, instead of using different parts for different modes, and achieve a good performance.