| 摘要 |
A duty-cycle adjustable clock generator (100) is disclosed. Combining a fundamental sinusoidal waveform (102, 104) with its phase-locked (114) second harmonic waveform generates the duty-cycle adjustable clock waveform. The clock generator maintains zero DC level and minimum reverse bias voltage swing at high microwave and millimeter wave frequencies. Proper phase shift between the fundamental and second harmonic waveforms produces the desired clock waveform. The duty-cycle is controlled by the magnitude ratio of the fundamental and phase-locked second harmonic waveforms. Due to the resulting zero DC level and minimum reverse bias voltage over the duty-cycle adjustable range, the duty-cycle adjustable clock generator can be effectively used in various microwave and optical communication systems.
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