发明名称 OUTPUT BUFFER CIRCUIT
摘要 PURPOSE: An output buffer circuit is provided to prevent the generation of noise due to the high intensity of current by reducing the current applied to a pull-up PMOS transistor and a pull-down NMOS transistor. CONSTITUTION: An output buffer circuit includes the first PMOS transistor, the first NMOS transistor, a low pulse generator(206), a high pulse generator(214), the second PMOS transistor, and the second NMOS transistor. The first PMOS transistor is turned on when a high level signal is inputted to an input terminal of the output buffer circuit. The first NMOS transistor is turned on when a low level signal is inputted to the input terminal of the output buffer circuit. The low pulse generation portion generates a low pulse after the high level signal is inputted to the input terminal of the output buffer circuit. The high pulse generation portion generates a high pulse after the low level signal is inputted to the input terminal of the output buffer circuit. The second PMOS transistor has a source connected to a power terminal, a drain connected to a drain of the first PMOS transistor, and a gate for receiving an output signal of the low pulse generation portion. The second NMOS transistor has a source connected to a ground terminal, a drain connected to a drain of the first NMOS transistor, and a gate for receiving an output signal of the high pulse generation portion.
申请公布号 KR20030060176(A) 申请公布日期 2003.07.16
申请号 KR20020000713 申请日期 2002.01.07
申请人 HYNIX SEMICONDUCTOR INC. 发明人 JUNG, HOE GWON
分类号 G11C11/40;(IPC1-7):G11C11/40 主分类号 G11C11/40
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