发明名称 METHOD FOR FORMING MULTI-LAYERED METAL LINE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for forming a multi-layered metal line of a semiconductor device is provided to enhance the reliability of the semiconductor device by forming a thin oxide layer on a planarized insulating layer having a low dielectric constant and performing a via contact process. CONSTITUTION: The first insulating layer(35) having a low dielectric constant is formed on a semiconductor substrate(31) including a lower metal line. The first oxide layer is formed thereon. The first oxide layer is planarized and the first insulating layer and the first oxide layer are etched back except for the first insulating layer on the lower metal line. The second insulating layer(39) having the low dielectric constant is formed on the semiconductor substrate. The second oxide layer is formed thereon. A via contact hole(45) is formed by etching the second oxide layer and the first and the second insulating layers having the low dielectric constants. An adhesive layer/diffusion barrier layer(47) is formed on the resultant. A contact plug is formed to bury the via contact hole. An upper metal line is formed thereon.
申请公布号 KR20030060480(A) 申请公布日期 2003.07.16
申请号 KR20020001201 申请日期 2002.01.09
申请人 HYNIX SEMICONDUCTOR INC. 发明人 YOON, JUN HO
分类号 H01L21/3065;H01L21/768;(IPC1-7):H01L21/768 主分类号 H01L21/3065
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