| 摘要 |
A semiconductor integrated circuit device includes a power-down generating circuit which generates a power-down control signal in response to a power-down signal externally supplied, a clock generating circuit which receives an external clock for generating internal clocks and is inactivated in response to the power-down signal, a chip select circuit which generates an input enable signal in response to a chip select signal externally supplied and is inactivated in response to the power-down signal, and an input circuit which receives an input signal externally supplied in synchronism with an internal clock.
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