发明名称 System for preventing power save mode during a pre-set condition while tracking patterns of use in order to modify the pre-set condition to accommodate the patterns of use
摘要 A computer peripheral device is prevented from being in power save mode by either forcing the peripheral device out of power save mode or preventing the peripheral device from entering power save mode. A timing mechanism tracks time. The timing mechanism either tracks the time of day, the day of the week, an elapsed time, or a combination of these times. The time tracked by the timing mechanism is compared to a pre-set condition stored in a storage device. If the time meets the pre-set condition, the computer peripheral device is prevented from being in power save mode. The computer peripheral device is prevented from being in power save mode by either transmitting a job to the peripheral device for processing, accessing the control means of the peripheral device and terminating the power save mode, or temporarily disabling the power save mode for the peripheral device.
申请公布号 US6594767(B1) 申请公布日期 2003.07.15
申请号 US20000541106 申请日期 2000.03.31
申请人 HEWLETT-PACKARD DEVELOPMENT COMPANY, LP. 发明人 WILEY STEVE R.;BURTON MARGARET J.;PAYNE DAVID M.;HOBEROCK TIM M.;EVANS MICHELLE E.
分类号 G06F1/32;(IPC1-7):G06F1/26 主分类号 G06F1/32
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