发明名称
摘要 <p>PROBLEM TO BE SOLVED: To provide a power saving circuit for making respective devices recognize a special cycle and simultaneously shifting the respective devices themselves into power saving state while utilizing the fact that the special cycle of a CPU is reported to a general bus as well. SOLUTION: This power saving circuit is provided with a CPU 10 for generating the special cycle for reporting the shift of a present device itself into halt state to a device to be interfaced, a Host-to-PCI Bridge 12 having a function for converting the special cycle generated by the CPU 10 to a special cycle based on a PCI bus protocol and a PCI device 14 equivalent to an ordinary PCI device for determining the operation thereof such as acquiring the bus cycle of a PCI or special cycle through the PCI bus and shifting the device itself into power saving state by responding to the PCI but cycle.</p>
申请公布号 JP3425888(B2) 申请公布日期 2003.07.14
申请号 JP19990081115 申请日期 1999.03.25
申请人 发明人
分类号 G06F1/32;(IPC1-7):G06F1/32 主分类号 G06F1/32
代理机构 代理人
主权项
地址