| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a method for designing a semiconductor device which attains logical synthesis while reducing deviation of delayed values of components as much as possible by considering size of delay fluctuation and positional dependency in more details. <P>SOLUTION: The method for designing the semiconductor device logically simulates structure by arranging a plurality of semiconductor chips on a wafer surface by using a design supporting device constituted by storing delayed values calculated by every kind of components 21 to 23 in logical circuits of the semiconductor chips and/or delayed values calculated by every one of signal routes 211, 212 in a library 10. By the method for designing the semiconductor device, exposure dependent fluctuation of delayed values to be caused by physical factors in the case of an exposure processing in a unit exposure area of the wafer surface on which the respective semiconductor chips are formed is added to the library 10 and propagation delay times of signal routes 25, 211, 212 in the logical circuits in the respective semiconductor chips are calculated respective based on the exposure dependent fluctuation and the delayed values. <P>COPYRIGHT: (C)2003,JPO</p> |
