| 摘要 |
PROBLEM TO BE SOLVED: To provide an MRAM device into which write data having a plurality of bits are written in parallel with low power consumption. SOLUTION: A bit line BL and a current feedback wiring RL are arranged for each memory cell column. A plurality of selection bit lines selected to respectively write data having a plurality of bits are serially connected to one current path and receives a supply of bit line writing currents. When different level data are written between adjacent selection bit lines, one end sides of the selection bit lines or the other end sides are connected together and the bit line writing currents are transmitted to the adjacent selection bit lines. When same level data are written between adjacent selection bit lines, on the other hand, the bit line writing currents are folded over using the corresponding current feedback wiring RL and the bit line writing currents are transmitted to a next selection bit line. COPYRIGHT: (C)2003,JPO
|
