发明名称 QUICKLY VERIFYING METHOD OF INTRINSIC RANDOM NUMBER GENERATING CHIP
摘要 <P>PROBLEM TO BE SOLVED: To provide a method for quickly verifying a nondefective and a defective of an intrinsic random number generating chip, and a self-verifying semiconductor chip incorporated with a circuit for performing this verifying method. <P>SOLUTION: The semiconductor chip is incorporated with a random number generating element for generating an intrinsic random number. This quickly verifying method of the intrinsic random number generating chip generates a random number of the optional bit number on the basis of a signal generated from the random number generating element, takes a fixed quantity of sample data in a prescribed time, (A) investigates an occurrence frequency of respective numeric values, counts the number of appearing respective numeric values, investigates an occurrence frequency exceeding the predetermined number or (B) an occurrence frequency of the respective numeric values, counts the number of numeric values nonappearing once, and verifies the occurrence frequency exceeding the predetermined number as the defective. The self-verifying intrinsic random number generating chip is performed by incorporating the circuit for performing this verifying method into the chip. <P>COPYRIGHT: (C)2003,JPO
申请公布号 JP2003196081(A) 申请公布日期 2003.07.11
申请号 JP20020085549 申请日期 2002.03.26
申请人 SAITO TAKESHI;LE TEKKU:KK 发明人 SAITO TAKESHI
分类号 G01R31/28;G06F7/58;H01L21/66 主分类号 G01R31/28
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