摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device proper for preventing the occurrence of latch-up and for a large current use in a charge pump device. SOLUTION: On a P-type single crystal silicon substrate 50, an N-type epitaxial silicon layer 51A and an N-type epitaxial silicon layer 51B are laminated, and P-type well area 52A and 52B are formed in the epitaxial silicon layer 51B. A (P<SP>+</SP>)-type embedded layer 55 in contact with the bottom of the P-type well areas 52 are formed, and (N<SP>+</SP>)-type embedded layer 56 which is in contact with the bottom of this (P<SP>+</SP>)-type embedded layer 55 and electrically separates the P-type well areas 52A and 52B from the P-type single crystal silicon substrate 50 is formed. MOS transistors are respectively provided within the P-type well areas 52A and 52B, and the drain layer D of the MOS transistor is electrically connected with the respective P-type well areas 52A and 52B. COPYRIGHT: (C)2003,JPO
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