发明名称 SEMICONDUCTOR MEMORY AND ITS TEST METHOD
摘要 PROBLEM TO BE SOLVED: To detect word line multiple selection caused by a defective program Raving a defective address. SOLUTION: Address allotment for spare sub-word lines (SSWL0-SSWL3) is made to differ from address allotment of normal sub-word lines (NSWL 0-NSWL3) by a spare address conversion circuit (14) at write or at read. Data is written so that a reversed data pattern is stored in a spare word line before address conversion and after address conversion. At occurrence of multi- selection, as confliction of data is caused in a correspondent bit line, multi- selection can surely be detected. COPYRIGHT: (C)2003,JPO
申请公布号 JP2003196995(A) 申请公布日期 2003.07.11
申请号 JP20010394114 申请日期 2001.12.26
申请人 MITSUBISHI ELECTRIC CORP 发明人 AKAMATSU HIROSHI
分类号 G01R31/28;G11C11/401;G11C29/00;G11C29/04;G11C29/24;(IPC1-7):G11C29/00 主分类号 G01R31/28
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