发明名称 Soft error recovery in microprocessor cache memories
摘要 A method and apparatus for protecting cache memories from soft errors. Entries in the cache's data store and tag memory are associated with parity bits. During a read cycle, the parity bits are checked and data retrieved only if the parity checks indicate no errors.
申请公布号 US2003131277(A1) 申请公布日期 2003.07.10
申请号 US20020044080 申请日期 2002.01.09
申请人 TAYLOR RICHARD D.;ALLEN GREG L. 发明人 TAYLOR RICHARD D.;ALLEN GREG L.
分类号 G06F12/08;G06F11/10;G06F12/16;H04L1/22;(IPC1-7):H04L1/22 主分类号 G06F12/08
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