| 摘要 |
Level-shifting circuitry having a level-shifting section and an enable/disable section. The level-shifting section is responsive to an input logic signal. The input logic signal has a first voltage level representative of a first logic state and a second voltage level representative of a second logic state. The level-shifting section provides an output logic signal, such output logic signal having a third voltage level representative of the first logic state of the input logic signal. The enable/disable section is responsive to an enable/disable signal for driving the output logic signal to the third voltage level during a disable mode, such third voltage level being greater than the first or second voltage levels. |
