发明名称 DRAM with bias sensing
摘要 A DRAM improves cell read margins using bias, or reference, circuitry. The reference circuitry is coupled to a complimentary digit line to improve a differential voltage with an active digit line. One embodiment, improves one's margin by decreasing the complimentary digit line voltage. The reference circuitry can be an un-programmed DRAM cell, a non-volatile ROM memory cell or a conductor coupled to a reference voltage.
申请公布号 US2003128609(A1) 申请公布日期 2003.07.10
申请号 US20030375626 申请日期 2003.02.27
申请人 MICRON TECHNOLOGY, INC. 发明人 DERNER SCOTT;KURTH CASEY;WALD PHILLIP G.
分类号 G11C7/14;G11C11/4099;(IPC1-7):G11C7/02 主分类号 G11C7/14
代理机构 代理人
主权项
地址