发明名称 Method of forming an FeRAM capacitor having a bottom electrode diffusion barrier
摘要 The present invention is directed to a method of forming an FeRAM integrated circuit, which includes forming a TiAlON bottom electrode diffusion barrier layer prior to formation of the bottom electrode layer in an FeRAM capacitor stack. Subsequently, when performing the capacitor stack etch, the portion of the TiAlON diffusion barrier layer not covered by the FeRAM capacitor stack is etched substantially anisotropically due to the oxygen within the TiAlON diffusion barrier layer substantially preventing a lateral etching thereof. In the above manner, an undercut of the TiAlON diffusion barrier layer under the FeRAM capacitor stack is prevented. In another aspect of the invention, a method of forming an FeRAM capacitor comprises forming a multi-layer bottom electrode diffusion barrier layer. Such formation comprises forming a TiN layer over the interlayer dielectric layer and the conductive contact and forming a diffusion barrier layer thereover. The TiN layer at least partially fills any seam that exists within the conductive contact, thus improving a conductivity between the FeRAM capacitor and a conductive contact in the interlayer dielectric.
申请公布号 US2003129771(A1) 申请公布日期 2003.07.10
申请号 US20020305838 申请日期 2002.11.26
申请人 SUMMERFELT SCOTT R.;AGGARWAL SANJEEV;SAKODA TOMOJUKI;CHI CHIU;MOISE THEODORE S. 发明人 SUMMERFELT SCOTT R.;AGGARWAL SANJEEV;SAKODA TOMOJUKI;CHI CHIU;MOISE THEODORE S.
分类号 H01L21/02;H01L21/285;H01L21/8246;H01L27/115;(IPC1-7):H01L21/00 主分类号 H01L21/02
代理机构 代理人
主权项
地址