| 摘要 |
A BGA package comprises a chip with an array pad design disposed on the top surface of a substrate. The chip has a plurality of bonding pads located about the periphery thereof. The bonding pads of the chip are positioned in three rows, an inner row, a middle row, and an outer row along the sides of the chip. All of the power supply pads and ground pads are adjacent to one another and designed in the outer row of the bonding pads, and the I/O pads are designed in the outer row, the middle row and the inner row of the bonding pads. The outer row, middle row, and the inner row of the bonding pads are electrically connected to the substrate through three tiers of bonding wires with different loop height, respectively.
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