发明名称 Method and device for generating an output signal as a mathematical function of an input signal
摘要 A device (1) for generating a digital output signal YLOG(k)/K) as a mathematical function of a digital input signal (XLOG(k)) includes a level-changing device (6), which by amplifying or attenuating the input signal (XLOG(k)) generates a first intermediate signal (A) that falls within a compressed argument range of the mathematical function and a correction signal (shiftLOG) dependent on the amplification or attenuation of the input signal (XLOG(k)). Tabulated function values of the mathematical function are stored at or between indices in a storage device (11). The tabulated function values (B1) are read from the storage device (11) in dependence on the first intermediate signal (A), and a second intermediate signal (B) is generated in dependence on the read tabulated function values (B1). The correction signal (shiftLOG) is subtracted from the second intermediate signal (B) in a subtractor (12) to yield the digital output signal YLOG(k)/K).
申请公布号 US2003131037(A1) 申请公布日期 2003.07.10
申请号 US20020321829 申请日期 2002.12.16
申请人 FREIDHOF MARKUS 发明人 FREIDHOF MARKUS
分类号 G06F17/17;G06F7/00;G06F7/556;G06F17/10;(IPC1-7):G06F7/00 主分类号 G06F17/17
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