发明名称 Processor and method with packet processing order maintenance based on packet flow identifiers
摘要 A processor having a packet processing order maintenance feature includes classification circuitry operative to identify for each of a plurality of packets received in the processor a corresponding packet flow identifier, control circuitry operatively coupled to the classification circuitry, and at least one operational unit operatively coupled to the control circuitry. The control circuitry is operative to direct one or more packets having a given packet flow identifier to the operational unit(s) in a manner that maintains a desired function call sequencing over the one or more packets having the given packet flow identifier for one or more order-dependent processing tasks in the processor. <IMAGE>
申请公布号 EP1326400(A2) 申请公布日期 2003.07.09
申请号 EP20020258103 申请日期 2002.11.25
申请人 AGERE SYSTEMS INC. 发明人 BROWN, DAVID ALLEN;CALLE, MAURICIO;PRASAD, ABRAHAM
分类号 H04L12/56;H04L29/06;(IPC1-7):H04L29/06;H04Q11/04 主分类号 H04L12/56
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