| 摘要 |
PROBLEM TO BE SOLVED: To realize the verification of the propagation of a failure signal of a lower wire covered with a wire at its upper layer, in failure analysis of a semiconductor integrated circuit using an electronic beam tester. SOLUTION: As only the wire in which a failure signal is predicted to be propagated, of the lower layer covered with the upper wire of the semiconductor integrated circuit (LSI), is exposed by etching, the calculation is performed by a layout computer 21 of a data processing device 2 on the basis of the layout data including a thickness of the wire, a thickness of a layer insulating film and the like to determine an inclination angle of a sample stage 12 of an etching device 1. Here, an actual image G2 acquired from coordinates executing the etching by using an image pick-up device 14 and a layout image G1 obtained by the calculation by the layout computer 21 are adjusted to be superposed to each other. An insulating film on the wire in which the failure signal is predicted to be propagated, is etched to expose the wire, then the electronic beam is applied from the electronic beam tester to analyze the failure. Whereby the wire can be exposed to perform the failure analysis by the electronic beam tester, even when the object wire is covered with the upper wire. COPYRIGHT: (C)2003,JPO
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