发明名称 |
Integrated circuit with configurable scan path |
摘要 |
The integrated circuit includes number of flip flops (FF1-1-FF1-m,FF-2-1-FF-2-n,FF-3-1-FF3-o) which can be connected in series upon instigation of the integrated circuit, such that the flip flops do not connect in series during the normal operation of the integrated circuit. Independent claims are also included for the following: (a) a synchronous digital circuit; and (b) a program controlled unit.
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申请公布号 |
EP1326082(A1) |
申请公布日期 |
2003.07.09 |
申请号 |
EP20010130849 |
申请日期 |
2001.12.27 |
申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
HUCH, MARTIN, DR.;KOCK, ERNST-JOSEF, DR.;MAMMITZSCH, JUERGEN;WAGNER, WOLFGANG;SULZER, HANS |
分类号 |
G01R31/3185;G11C29/32;(IPC1-7):G01R31/318;G11C29/00 |
主分类号 |
G01R31/3185 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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