发明名称 Delay time controlling circuit and method for controlling delay time
摘要 A delay time controlling circuit in a semiconductor memory device and method thereof for controlling a delay time preferably comprise a controller, a fuse unit having selectable fuse elements, a multiplexer, and a programmable variable delay circuit. With the multiplexer selecting the output of the controller, the controller generates a sequence of differing digital delay control signals to the programmable variable delay circuit in order to provide a plurality of unique delays in an output signal. When a desired time delay is monitored in the output signal, a programming signal is generated, which causes the specific digital control signal to be permanently programmed into the fuse unit via selective cutting of fuse elements. The multiplexer is then toggled via a selector fuse element to permanently select the output of the fuse unit as a control value source for the variable delay circuit.
申请公布号 US6590434(B2) 申请公布日期 2003.07.08
申请号 US20020191413 申请日期 2002.07.10
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 CHUNG HOE-JU;JANG TAE-SEONG;KIM KYU-HYOUN
分类号 G11C29/00;G11C7/22;G11C11/407;G11C29/02;H03K5/00;H03K5/13;H03L7/081;(IPC1-7):H03H11/26 主分类号 G11C29/00
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