| 摘要 |
PURPOSE: A method of manufacturing a DRAM cell is provided to prevent a damage of the space of a bitline, voids, and shrinkage of the opening part of a storage node by forming a storage node after a bitline, a line type self align contact, and a space of the bitline are sequentially formed. CONSTITUTION: The first interlayer dielectric having a contact hole for bitline is formed on a lower structure(41) including a plug to bury a gap between wordlines(43). A bitline(53) formed under a hard mask layer(45), is formed to connect the plug. The second interlayer dielectric is formed on the entire surface including the bitline. A contact hole for storage node is formed by etching the first and second interlayer dielectric by a photolithography process using a line type storage node contact mask. An insulation spacer is formed at both sides of the bitline including a hard mask layer(55). A storage node(63) connected to a plug(49) through the contact hole for storage node is formed.
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