发明名称
摘要 The system uses a signal delay in order to ensure reliable identification of original transmission clock signal. The method enables isolation of a frequency block from a received signal which is formatted in blocks. The received signal is preferably formed of symbols having a coded modulation emitted according to an orthogonal frequency division multiplex pattern (OFDM). The circuit comprises an element for delaying (12) the symbol blocks, and for correlating (13) a block of symbols with a delayed block of symbols to which it corresponds. This results in a difference signal (e(t)) which serves for synchronisation purposes.
申请公布号 JP3423934(B2) 申请公布日期 2003.07.07
申请号 JP20010010774 申请日期 2001.01.18
申请人 发明人
分类号 H03L7/08;H04B1/16;H04J11/00;H04L7/027;H04L27/26 主分类号 H03L7/08
代理机构 代理人
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