发明名称 METHOD FOR FORMING VIA HOLE OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE ACCORDING TO THE SAME
摘要 PURPOSE: A method for forming a via hole of a semiconductor device and a semiconductor device according to the same are provided to be capable of preventing the generation of corrosion and black via phenomenon and improving electric conductivity. CONSTITUTION: A metal layer(52), a metal oxide layer(54) used as a capping layer, an interlayer dielectric(56) made of an oxide layer are sequentially deposited at the upper portion of a semiconductor substrate. A via hole(60) is formed by carrying out a photolithography process at the interlayer dielectric for exposing the metal oxide layer. Then, the metal layer is exposed by selectively etching the metal oxide layer by using the via hole. A barrier metal layer(62) is formed along the surface of the via hole. A plug(64) is completely filled in the via hole.
申请公布号 KR20030058846(A) 申请公布日期 2003.07.07
申请号 KR20020000071 申请日期 2002.01.02
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 HWANG, WON TAE
分类号 H01L21/28;(IPC1-7):H01L21/28 主分类号 H01L21/28
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