| 摘要 |
PURPOSE: A method for fabricating a semiconductor device is provided to improve the profile of a bitline and reduce contact resistance by respectively forming interlayer dielectrics of different kinds in a cell region and a peripheral circuit region and by using a thin film not requiring a heat treatment in the peripheral circuit region. CONSTITUTION: A gate electrode(105) on which a mask insulation layer is stacked is formed in the cell region and the peripheral circuit region of a semiconductor substrate(101). The first insulation layer and the first interlayer dielectric are formed and a heat treatment process is performed to flow the first interlayer dielectric. The first interlayer dielectric in the peripheral circuit region is removed. The second insulation layer is formed. The second and first insulation layers are blanket-etched to form the second and first insulation layer spacers(117,110) on the sidewall of the gate electrode in the peripheral circuit region. Impurity ions are implanted into the substrate at both sides of the second insulation layer spacer to form a source/drain region(116). The second interlayer dielectric(119) is formed on the peripheral circuit region. The first interlayer dielectric is etched to form a contact hole. A polycrystalline silicon layer is formed. The polycrystalline silicon layer and the first/second interlayer dielectric are removed to form a poly plug through a planarization etch process. The third interlayer dielectric is formed. The third and second interlayer dielectrics are etched to form a bitline contact hole(127) by using the bitline contact mask as an etch mask.
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