| 摘要 |
PURPOSE: A device and a method for communicating between a fast processor and the device are provided to smoothly communicate the processor synchronized with a fast clock and the self-synchronous device synchronized with a slow clock, or the processor synchronized with the fast clock and a fast or slow asynchronous device. CONSTITUTION: A CPU(210) is operated by synchronized with the fast clock, and communicates with the slow self-synchronous device(220) through an address bus and a data bus. The slow self-synchronous device(220) is synchronized according to a slow synchronization clock. A response signal of the slow self-synchronous device(220) is transferred to the CPU(210) through a logic device(230). The logic device(230) transfers the response signal generated from the slow self-synchronous device(220) to the CPU(210) following a rising or a falling edge according to the setting of the CPU(210). Thus, the response signal does not express more than one clock by being generated on a proper timing of a CPU instruction.
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