发明名称 METHOD FOR FORMING DUAL DAMASCENE PATTERN OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for forming a dual damascene pattern of a semiconductor device is provided to be capable of improving etching profile and processing margin by compensating etching damage when forming a trench. CONSTITUTION: A metal diffusion barrier layer(34), the first insulating layer(35), an etch stop layer(36), the second insulating layer(37) and the first anti-reflective layer are sequentially formed on a semiconductor substrate(31) having metal lines(33). A via hole(40a) is formed to expose the metal diffusion barrier layer(34). After removing the first anti-reflective layer, the second anti-reflective layer is formed on the second insulating layer and in the via hole. After partially removing the second anti-reflective layer, the third insulating layer is formed on the exposed second and first insulating layer. A trench(40b) is then formed by selectively etching the second insulating layer. After entirely removing the second anti-reflective layer, the metal diffusion barrier layer is removed to expose the metal lines(33).
申请公布号 KR20030057902(A) 申请公布日期 2003.07.07
申请号 KR20010088005 申请日期 2001.12.29
申请人 HYNIX SEMICONDUCTOR INC. 发明人 YOON, JUN HO
分类号 H01L21/768;(IPC1-7):H01L21/768 主分类号 H01L21/768
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