| 摘要 |
PURPOSE: A method of manufacturing a DRAM cell is provided to perform a storage contact hole formation after forming a line type nitride layer that is to expose the portion of a capacitor on a lower structure including a bitline. CONSTITUTION: The first interlayer dielectric and nitride layer are sequentially formed on a lower structure including a plug and bitline. A nitride layer is formed by a photolithography process using a line type mask for storage contact crossing the bitline(53). The second interlayer dielectric is formed by the first interlayer dielectric including the nitride layer. A contact hole for a storage node is formed by etching the first and second interlayer dielectric. A storage node connected to a plug(49) through the contact hole for storage node is formed.
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