| 摘要 |
PURPOSE: A row address counter circuit of a semiconductor memory device is provided to shorten the refresh time by removing the entrance time into the test mode by automatically refreshing the redundant cell after the normal cell is refreshed. CONSTITUTION: A row address counter circuit of a semiconductor memory device includes 14 number of row address counters(21-34), a normal cell counter block(35) and a normal/redundancy cell refresh block(36). In the row address counter circuit, the plurality of row address counters(21-34) count the plurality of row addresses and redundancy cells in response to the first refresh command signal. And, the normal/redundancy cell refresh block(36) refreshes the normal cells or the redundancy cells in response to the redundancy cell count signal and the second refresh command signal.
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