发明名称 MEMORY TEST DEVICE
摘要 PURPOSE: A memory test device is provided to effectively reduce the cost for the test by using a test logic circuit and repair analysis circuit. CONSTITUTION: A memory test device(304) for testing a memory(302) electrically connected to a test board includes a test logic circuit(306), a recovery analysis circuit(308), a de-multiplexor(312) and a multiplexor(314). In the memory test device(304), the test logic circuit(306) performs the functional test of the memory(302) and the recovery analysis circuit(308) stores the address occurring the failure after the test and performs the recovery analysis. The memory test device(304) is mounted on the test board.
申请公布号 KR20030056397(A) 申请公布日期 2003.07.04
申请号 KR20010086601 申请日期 2001.12.28
申请人 HYNIX SEMICONDUCTOR INC. 发明人 PARK, SANG UK
分类号 G11C29/00;(IPC1-7):G11C29/00 主分类号 G11C29/00
代理机构 代理人
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