发明名称 MEASURING SYSTEM FOR FAIL BIT MAP OF SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To obtain a measuring system for a fail bit map of a semiconductor memory in which FBM data at high speed operation of a memory can be gathered even when a fault exists in a RAM for storing FBM data. SOLUTION: FBM data D1 obtained from a result of a test of a RAM to be tested is stored in a RAM 1 for store formed in the same chip as the RAM to be tested, the FBM date D1 written in a fault region R1 by fault region information R3 in which an address of the fault region R1 of the RAM 1 for store is recorded is also written in a spare region R4 being not defective, and it functions as the RAM 1 for store even when a fault exists in the RAM 1 for store. COPYRIGHT: (C)2003,JPO
申请公布号 JP2003187594(A) 申请公布日期 2003.07.04
申请号 JP20010386932 申请日期 2001.12.20
申请人 MITSUBISHI ELECTRIC CORP 发明人 YONEMORI GENICHI
分类号 G01R31/28;G11C29/00;G11C29/12;G11C29/44;(IPC1-7):G11C29/00 主分类号 G01R31/28
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