发明名称
摘要 An etch-stop layer is selectively provided between layers of a multiple-layered circuit in a selective manner so as to allow for outgassing of impurities during subsequent fabrication processes. The etch-stop layer is formed over an underlying stud so as to serve as an alignment target during formation of an overlying stud formed in an upper layer. In this manner multiple-layered circuits, for example memory devices, can be fabricated in relatively dense configurations.
申请公布号 KR100389924(B1) 申请公布日期 2003.07.04
申请号 KR20010004224 申请日期 2001.01.30
申请人 发明人
分类号 H01L21/768;H01L27/10;H01L21/8242;H01L23/02;H01L23/48;H01L23/52;H01L27/108;H01L29/40 主分类号 H01L21/768
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