| 摘要 |
PROBLEM TO BE SOLVED: To surely output a prescribed logic signal when a control power supply voltage is lowered. SOLUTION: When a control power supply voltage VCC2 becomes lower than an operation guarantee voltage level V1, the output of a start-up circuit 47 becomes an H level, a NOR gate 36 outputs the output cutoff signal of an L level, and FET 31 and 32 are driven off. When the control power supply voltage VCC2 is further lowered, the operation of an output cutoff control circuit 46 may become unstable but in such a case, the FET 31 and 32 are maintained in the off-state by the pull-down operation of a resistor 39. As a result, in the range of all control power supply voltages lower than the operation guarantee voltage level V1, the output of an output circuit 23 turns to high impedance. COPYRIGHT: (C)2003,JPO
|
