发明名称 Device and method for information processing
摘要 In an information processing device, a first address adder generates a first address representing a target for write of data or a storage location of data to be read. A second address adder generates a second address by adding 8 to the first address. First to seventh selectors appropriately select either the first address or the second address, and supply the selected address to first to seventh memory areas, respectively. An eighth memory area is supplied with the first address.
申请公布号 US2003126402(A1) 申请公布日期 2003.07.03
申请号 US20020318115 申请日期 2002.12.13
申请人 FUJITSU LIMITED 发明人 OKANO HIROSHI;HAYAKAWA FUMIHIKO
分类号 G06F12/04;G06F12/08;(IPC1-7):G06F12/00 主分类号 G06F12/04
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