发明名称 |
Method and apparatus for communicating between integrated circuits in a low power mode |
摘要 |
For one embodiment, a computer system includes both high power and low power buses coupling a processor to a controller. When the processor is in a high power mode, its cache is snooped by the controller via the high power bus. When the processor is in a low power mode, its cache is snooped by the controller via the low power bus.
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申请公布号 |
US2003126377(A1) |
申请公布日期 |
2003.07.03 |
申请号 |
US20010040608 |
申请日期 |
2001.12.28 |
申请人 |
ORENSTIEN DORON;YUFFE MARCELO |
发明人 |
ORENSTIEN DORON;YUFFE MARCELO |
分类号 |
G06F1/32;G06F12/08;G06F13/00;(IPC1-7):G06F13/00 |
主分类号 |
G06F1/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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