发明名称 MULTIINPUT LOGICAL GATE
摘要 A multiinput logical gate has a first resistor, and a second resistor one end of which is connected to a power source each, a current source, m pieces of transistors (m is an integer of 2 or more) the sources of which are parallel-connected to the current source, and the drain of which to the other ends of the first resistors, and m pieces of transistors the sources and drains of which are series-connected between the current source and the other ends of the second resistors. M pairs of differential input signals are inputted to the gates of the parallel-connected transistors and the gates of the series-connected transistors, respectively, and are outputted from the other ends of the first and second resistors as differential signals, respectively.
申请公布号 WO03055074(A1) 申请公布日期 2003.07.03
申请号 WO2002JP13191 申请日期 2002.12.17
申请人 NIPPON TELEGRAPH AND TELEPHONE CORPORATION;NTT ELECTRONICS CORPORATION;SHIMPO, YUKIO;YAMAGISHI, AKIHIRO;TSUKAHARA, TSUNEO 发明人 SHIMPO, YUKIO;YAMAGISHI, AKIHIRO;TSUKAHARA, TSUNEO
分类号 H03K19/20;H03K19/094;H03K19/0944;(IPC1-7):H03K19/20 主分类号 H03K19/20
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