发明名称 Method and apparatus for eliminating the software generated ready-signal to hardware devices that are not part of the memory coherency domain
摘要 The specification discloses a method and related system that allows hardware devices to participate in the coherency domain of a computer system. More particularly, hardware devices such as network interface cards, audio cards, input/output cards, and the like, are allowed to participate on at least a limited basis in the coherency domain by having cache memory that duplicates a FIFO buffer in main memory used to exchange information between software and the hardware. To exchange information, software writes to the FIFO buffer which invalidates the data in the cache-type memory of the hardware device, and the invalidation message acts to notify the hardware device of the availability of information in the FIFO buffer.
申请公布号 US2003126341(A1) 申请公布日期 2003.07.03
申请号 US20010034464 申请日期 2001.12.28
申请人 BONOLA THOMAS J.;LARSON JOHN E.;OLARIG SOMPONG P. 发明人 BONOLA THOMAS J.;LARSON JOHN E.;OLARIG SOMPONG P.
分类号 G06F5/10;G06F12/08;(IPC1-7):G06F13/36 主分类号 G06F5/10
代理机构 代理人
主权项
地址