发明名称 METHOD FOR FORMING VIA HOLE
摘要 PURPOSE: A method for forming a via hole is provided to be capable of preventing the increase of top size of a via hole caused by trench etching in self-aligned dual damascene processing. CONSTITUTION: An inorganic insulating layer(206) and a barrier layer(211) are sequentially formed on a semiconductor substrate(200) having a conductive layer(202). A via hole(207) is formed by selectively etching the barrier layer and the inorganic insulating layer using the first photoresist pattern as a mask. After removing the first photoresist pattern, an organic insulating layer(214) is filled into the via hole. A trench(215) is formed by selectively etching the organic insulating layer(214) using the second photoresist pattern as a mask. The second photoresist pattern is then removed.
申请公布号 KR20030054065(A) 申请公布日期 2003.07.02
申请号 KR20010084161 申请日期 2001.12.24
申请人 HYNIX SEMICONDUCTOR INC. 发明人 CHOI, IK SU;KIL, MIN CHEOL;KIM, CHUNG BAE;LEE, JAE JUNG
分类号 H01L21/28;(IPC1-7):H01L21/28 主分类号 H01L21/28
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