| 摘要 |
PURPOSE: A method for forming a bit line of a semiconductor device is provided to prevent the short circuit between a bit line and other lines by forming the bit line at a lower portion of a P-well. CONSTITUTION: A mask pattern for bit line is formed on a silicon substrate(1). A bit line(2) is formed within the silicon substrate by an implantation process. The mask pattern for bit line is removed. A P-well(3) is formed on the bit line within the silicon substrate. A field oxide layer(4) is formed within the P-well. A gate insulating layer(5), a gate electrode(6), and a mask nitride layer(7) are formed on the silicon substrate. A word line is formed by patterning the mask nitride layer, the gate electrode, and the gate insulating layer. A source/drain region(21) is formed on the silicon substrate of the outside of the word line. A nitride layer spacer(8) is formed on a sidewall of the word line. The source/drain region is exposed by a wet etch method. A bit line contact plug and a storage node contact plug(10b) are simultaneously formed thereon. The first insulating layer(9) is formed between the word lines. The first insulating layer is planarized by a CMP(Chemical Mechanical Polishing) process or an etch-back process. The second insulating layer is deposited on the resultant and a bit line contact mask pattern is formed thereon. The bit line contact plug and the silicon substrate are etched by using the bit line contact mask pattern. The bit line contact mask pattern is removed and the third insulating layer(14) is deposited thereon. The third insulating layer is formed on an inner side of the bit line contact. A bit line is formed by depositing and etching a bit line contact plug(15) thereon. The fourth insulating layer(16) is deposited on the bit line contact plug. The storage node contact plug is opened by the etch-back process or the CMP process.
|
