发明名称 Frequency determination circuit for a data processing unit
摘要 A frequency determination circuit (204) determines, with a high precision, whether the frequency of a clock signal (CLK) is higher or lower than a reference frequency. A capacitor element (251) is charged/discharged with a power supply voltage (VDD) that is cycled by a switching transistor according to the clock signal. A comparator circuit (215) compares a constant reference voltage produced by a band-gap regulator (211) circuit from the power supply voltage with a voltage stored in the capacitor element. A high/low determination circuit (216) determines, from the output signal of the comparator circuit, whether the clock signal frequency is higher or lower than a predetermined reference frequency. This makes it possible to determine with precision whether the clock signal has a low frequency or a high frequency. <IMAGE>
申请公布号 EP1180689(A3) 申请公布日期 2003.07.02
申请号 EP20010306815 申请日期 2001.08.09
申请人 NEC CORPORATION 发明人 SAITO, HIROFUMI
分类号 G06F1/28;G01R23/15;G06F1/04;H03K5/19 主分类号 G06F1/28
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