发明名称 METHOD FOR FORMING METAL INTERCONNECTION
摘要 PURPOSE: A method for forming a metal interconnection is provided to be capable of preventing stress, leakage current and parasitic capacitance of a bit line by forming an oxide spacer at both sidewalls of a word line and the bit line. CONSTITUTION: A metal interconnection(35) is formed on a semiconductor substrate(31). An oxide layer having the thickness of 50-800Å is formed on the resultant structure by chemical vapor deposition by using TEOS gas without using oxygen gas at the temperature of 550-700°C. By blanket etching of the oxide layer, an oxide spacer(37) is formed at both sidewalls of the metal interconnection.
申请公布号 KR20030054669(A) 申请公布日期 2003.07.02
申请号 KR20010084882 申请日期 2001.12.26
申请人 HYNIX SEMICONDUCTOR INC. 发明人 JUN, YUN SEOK;KIM, JAE OK;LEE, SANG MU
分类号 H01L21/28;(IPC1-7):H01L21/28 主分类号 H01L21/28
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