发明名称 Method and apparatus for implementing fault tolerant logic in a storage system
摘要 A mechanism for implementing fault tolerant logic in an information storage system is disclosed. The mechanism comprises an inhibit logic which is invoked when the first RUNOUT block of a link sequence is detected. Once invoked, the inhibit logic outputs a disable signal, and so long as the disable signal is asserted, certain control signals are inhibited. These control signals may include a trigger signal, a target match signal, and a miss signal. The disable signal is maintained during the reading of blocks, such as link sequence blocks, in which information corruption is most likely to occur. By doing so, the inhibit logic prevents erroneous signals generated as a result of corrupted information from adversely affecting the operation of the storage system. As a result, the corrupted information is tolerated.
申请公布号 US6587973(B1) 申请公布日期 2003.07.01
申请号 US20000510705 申请日期 2000.02.22
申请人 OAK TECHNOLOGY, INC. 发明人 TANAKA AKIO
分类号 G11B20/18;G11B27/30;(IPC1-7):H02H3/05;G11B5/09 主分类号 G11B20/18
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