| 摘要 |
A method for programming a circuit comprising the steps of (A) simulating one or more states, (B) building program information in response to said simulation and (C) extracting from said simulation one or more unique states having current state to next state sequences. The present invention includes a method and/or architecture that may implement (i) content addressable memory system (CAMS), (ii) memory, (iii) register files and (iv) other logic to implement programmability on application specific integrated circuits (ASICs). The architecture is performance and cost competitive with field programmable gate arrays (FPGAs) and programmable logic devices (PLDs).
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