发明名称 Method and system for predictive layout generation for inductors with reduced design cycle
摘要 In one embodiment, a number of parameter values for an inductor, such as a spiral inductor, are received. Examples of the parameter values are Number of Turns, Spacing, Width, Xsize, and Ysize parameter values. From the received parameter values, a number of parasitic values for a subcircuit model of the inductor are determined. For example, parasitic resistor values and parasitic capacitor values of the inductor are determined. The parasitic resistor values and parasitic capacitor values are used in simulating the circuit comprising the inductor. An inductor layout is then generated that results in parasitic values that are the same as the parasitic values already used in simulating the circuit comprising the inductor. As such, the parasitic values of the inductor have already been taken into account in the initial circuit simulation and, there is no need to extract the internal parasitics of the inductor for further circuit simulations.
申请公布号 US6588002(B1) 申请公布日期 2003.07.01
申请号 US20010941883 申请日期 2001.08.28
申请人 CONEXANT SYSTEMS, INC. 发明人 LAMPAERT KOEN;BROTMAN ANDY;MILIOZZI PAOLO;SINGH PARAMJIT;MATLOUBIAN MISHEL;BHATTACHARYYA BIJAN;ROTELLA FRANCIS M;DIVECHA RAJESH
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
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