发明名称 Method and apparatus for implementing multiple memory buses on a memory module
摘要 A computer system memory module includes a bi-directional repeater hub that in a first direction takes as an input a memory bus signal in a first port, regenerates the memory signals, and outputs the regenerated memory signal at a second port as at least one separate signal for coupling to a memory bus for each of the regenerated separate signals. In a second direction, the bi-directional repeater hub takes as input at least one memory bus signal at the second port, regenerates each input memory bus signal, and outputs the regenerated memory signal at the first port for coupling to a memory bus.
申请公布号 US6587912(B2) 申请公布日期 2003.07.01
申请号 US19980163860 申请日期 1998.09.30
申请人 INTEL CORPORATION 发明人 LEDDIGE MICHAEL W.;HORINE BRYCE D.;BONELLA RANDY;MACWILLIAMS PETER D.
分类号 G06F13/42;(IPC1-7):G06F12/00 主分类号 G06F13/42
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