| 摘要 |
PURPOSE: A semiconductor memory cell is provided to control the variation of a plate voltage in an operation of a dynamic random access memory(DRAM) and reduce variation of data written in a cell by serially connecting a capacitor connected to a ground voltage with a cell capacitor. CONSTITUTION: A gate of a switching transistor is connected to a wordline, connected between a bitline and a storage node. A cell capacitor is connected between the storage node and the plate voltage. A potential variation preventing device controls the variation of the plate voltage, connected between the ground voltage and one terminal of the cell capacitor to which the plate voltage is applied.
|
