发明名称 METHOD FOR FABRICATING FLASH MEMORY CELL
摘要 PURPOSE: A method for fabricating a flash memory cell is provided to embody a smaller device while guaranteeing a maximum coupling ratio of a floating gate by controlling a wall sacrificial oxide process, a wall oxide process and a trench insulation layer cleaning process after a trench insulation layer is formed so that the trench insulation layer is etched by a desired space. CONSTITUTION: A pad oxide layer and a pad nitride layer are formed on a semiconductor substrate(10). A trench is formed in the semiconductor substrate. After the trench insulation layer(24) is formed on the resultant structure, the first planarization process is performed to isolate the trench insulation layer. The pad nitride layer is eliminated to protrude a predetermined portion of the trench insulation layer. An etch process is performed to etch the protrusion of the trench insulation layer by a predetermined width. After the first polysilicon layer is formed on the resultant structure, the second planarization process is performed to form the floating gate. After a dielectric layer and the second polysilicon layer are formed on the resultant structure, an etch process is performed to form a control gate.
申请公布号 KR20030053314(A) 申请公布日期 2003.06.28
申请号 KR20010083493 申请日期 2001.12.22
申请人 HYNIX SEMICONDUCTOR INC. 发明人 AHN, JEONG RYEOL;JUNG, SEONG MUN;KIM, JEOM SU;LEE, YEONG BOK;SHIN, YEONG GI
分类号 H01L21/762;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L27/115 主分类号 H01L21/762
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